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Im Rahmen des Informatik-Kolloquiums, das von den Instituten des Fachbereichs Informatik, der Österreichischen Gesellschaft für Informatik (ÖGI), der Arbeitsgemeinschaft für Datenverarbeitung (ADV) sowie der Österreichischen Computergesellschaft (OCG) abgehalten wird, spricht

Mo Movahed, Fahim Rahim, Hans-Jörg Peter

über das Thema:

Atrenta - Early Design Closure using Formal Methods

Zeit: Thu 13.3.2014, 08:30, 90 Minuten
Ort: Johannes Kepler University Linz, Science Park 1, MT 226

Zusammenfassung

Atrenta's SpyGlass(r) Predictive Analysis software platform significantly improves design efficiency for the world's leading semiconductor and consumer electronics companies. Patented solutions provide early design insight into the demanding performance, power and area requirements of the complex system on chips (SoCs) fueling today's consumer electronics revolution. More than two hundred companies and thousands of design engineers worldwide rely on SpyGlass to reduce risk and cost before traditional EDA tools are deployed. SpyGlass functions like an interactive guidance system for design engineers and managers, finding the fastest and least expensive path to implementation for complex SoCs. In our presentation, we will present the formal verification technologies used in SpyGlass. We will also cover current challenges in the design of efficient data structures and algorithms that the hardware verification community is facing right now.

Vortragender

Mo Movahed is Vice President of Engineering at Atrenta. He has over 20 years of engineering and management experience in the EDA industry and Internet pplication Infrastructure. Fahim Rahim is a senior director of engineering at Atrenta's European Research and Development Office in Grenoble, France. Hans-Jörg Peter is a senior researcher and software architect at Atrenta. Atrenta is the leading provider of Early Design Closure(r) solutions to radically improve design efficiency throughout the IC design flow.
Einladender: Prof. Armin Biere, Institute for Formal Models and Verification

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Last modified on Thursday, 01-Jan-1970 01:00:00 CET